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AD7190 Status Register

Question asked by gclark on Feb 21, 2012
Latest reply on Feb 22, 2012 by gclark

My goal is to read the AD7190 status register.  First I write to the communications register in verilog.  I am always getting 8'b00000000

as my result.  This read process is in a state machine and the S_READ_STATUS follows writing the configuration and mode registers (switching channels).  The data register is being read okay following the configuration and mode register write operations.  According to the data sheet:

 

 

//===========================================================================

//  The status register is an 8-bit, read-only register.  To access the ADC status register, the user

//  must write to the communications register, select the next operation to be a read, and load Bit

//  RS2-RS0 with 0. 

//===========================================================================

 

 

  else if (state == S_READ_STATUS)

      begin 

    if (!CycleActive)

     begin

                  SpiDataOut <= {CMD_READ_STATUS,24'h000000};

                 TransferStartPulse  <= 1;

                  CycleActive   <= 1;

                  TransferLength   <= 1;

              end

       

             else if (TransferStartPulse)

             TransferStartPulse <= 0;

        

          else if (TransferDonePulse)

       begin

              ADC_STAT_REG[7:0] <= SpiDataIn[15:8]; 

               CycleActive <= 0;

               AdChannel <= !AdChannel;

                state <= S_IDLE;   

       end

          

    end  

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