I'm using the 21489 as SPI master to communicate with the AD5663 ADC chip.
The AD5663 chip requires a frame holdoff of 2us between SPI transactions for acquisitions. Is it possible for me to use the STDC field in SPIBAUD and the WTWDEN in SPICTL to introduce this 2us holdoff? The HRM r0.3 p 15-17 seems to indicate that this is possible but I have no luck in getting it to work.
My code performs a transfer and waits for the RXS flag to be set before going on to the next transfer. When I scope out the bus, I'm seeing the SPI CS asserted for the duration between each iteration, rather than the programmed delay.
I've set the delay to 10 just to see any changes but nothing.