I'm using AD9912 evaluation board to generate 242MHz output. The strongest harmonics I saw on the spectral analyser is at fs/2-fout. It is around 62dBc. Is there any technique to mitigate this signal?
Not sure you can mitigate the spur totally but here's some ideas in no particular order.
1) Raise the fundamental power and see if it helps SFDR. The thought, the spur power will not rise proportionally with the fundamental power. The DAC max full scale current is 30mA. I think the AD9912 evaluation board is setup for 20mA.
2) More bypassing on the power supply pins. Probably the most sensitive is the DAC power supply pins.
3) Are you using the AD9912 evaluation board? If not, do you use an transformer to couple the DDS output? If not, they may help some.
4) If 242MHz is the max output, you could reduce the sampling rate a little. It would move the Fs/2-fout closer to the fundamental but the spur magnitude may go down.
Thanks for all the suggestions!
I’m using AD9912 evaluation board with the on board filter circuits.
Initially I only used 2 power supplies, one 3.3V and one 1.8V. After Paul’s suggestion, I changed to supply one power supply point with one channel. The spurs is reduced by 10dB. It’s a little headache to get 6 power supply channels for only one device. I am thinking to construct a 3X3.3V and 3X1.8V power bank for the evaluation board. I will try to increase the fundamental power. I can’t the sampling frequency. This will be locked to one external frequency which will be changed a little bit over time.
I'm trying this myself. However, I didn't notice the 10dB change as you did. I'm using 7 power supply channels (including 3 SMA). I was wondering if you could tell me the setup that you used as I'm looking to reduce a spur of -48dBc when the fundamental is 400MHZ. That would be very helpful.
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