Can ADV7619 CSC be functioned well for 1080P input with 2x24bit output (OP_FORMAT_SEL[7:0]=0x54)?
I don't think the output format would have any effect on the CSC-- it should work fine for 1080p.
I tried it on adv7619mebz. With 1080P input run the script "PortA_720p_1080i_1080p_Any_CSpaceIn_36bit_RGB_from_ADV761X_thru_HDMI_Out_36bit_RGB_FS_VIC_4_5_19_20.py" to get the stable output image. Base on this setting to change OP_FORMAT_SEL to 0x96 or 0x54(2x24bit output) and output clock rate divided by 2 then the CP/DPP function seems to be invalid no matter for CSC, contrast, brightness...
I just want to know whether the CP/DPP is bypassed when 2x24bit or 2x16bit output is configured. In HW manual it just mentioned "HDMI video with pixel clock frequencies above 170 MHz must be routed directly to Video Output Formatter bypassing Data Preprocessor (DPP) and Component Preprocessor (CP)."
I talked with the ADV7619 expert and he said the following:
2x24 modes implies bypassing CP core. (all those 0x96, 0x54 etc…) so no CSC.
As per the above discussion 2x24 modes CP core will always be by pass in this mode.
So if input video clock is less than 170MHz, frequency at LLC pin should be 1/2 * input ciock, is this correct?
2. I tried above mention test (by Schang) but image colors becomes bad. Please let me know if there is any step missed in above mention test.
1) yes the pixel clock will be 1/2
2) check the DR_STR register the drive strength. if you over drive the outputs you can get some strange results. Try lowering them a bit.
3) At high pixel rates you may have to tweak LLC_DLL_PHASE. It's dependent on you board implementation.
Retrieving data ...