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Ad9389b, tmds and clock driver strength

Question asked by mbu on Feb 15, 2012
Latest reply on Feb 16, 2012 by mbu

Probably due to PCB layout and other HW variations we are having some signal issues on some HDMI outputs.

 

This can be observed as failing "eye-diagrams" on higher resolutions, 1920x1080p60 and in particular 1600x1200p60.

 

From ad9889b/ad9389b Programming Guide rev A 2010:

0xa2 => Differential data output drive strength

0xa3 => Differential Clock output drive strength

Recommended setting is 0x87 for both registers.

 

I have tried some different values in the registers 0xa2 and 0xa3 and can see that they have an effect.

 

Is it possible to provide some more information about the separate bits in these registers ?,

or other related (but not documented) registers ?

 

If we could just fine-tune the output to pass the tests it would be very helpful.

 

 

Martin

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