Questions for AD8368 AGC Loop expert
1. When they state the set point is = 63mV(rms)) -11dBm, is this the VGA-AGC-Loops inherent area where it what’s to stay at?
· Can this be changed-reduced for lower voltage, lower noise figure?
2. How can you (or can you) make the AGC circuit widebanded for a waveform with a high creast factor that are greater than >> 50 MHz wide?
- It seems for constant envelope modulation this would not be so difficullt (MSK, FSK, FM)
3. On Page 12 formulas are given for determing the values of C(HPFL) and C(DECL). I don’t understand the data sheet text clearly enough to actually determine these values.
4. How do you numerically determine the value for the detectors integrating capacitors?
5. Using a resistor divider to increase the set point voltage would increase the stead state Noise Figure, right.
6. How does this formula work: RSSI = -11dBm +38*V(DETO) -24.8
7. What frequency is the evaluation board set to work at?