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ASYNC Mem and GPIOs on BF54x

Question asked by plexer on Feb 6, 2012
Latest reply on Feb 7, 2012 by plexer



I was wondering whether I have to set the PORTx_FER registers for all async mem signals on the BF54x for proper functionallity of the async mem bus, since they are multiplexed with GPIOs? Is this true?

If yes, where is the best place to do this? The provided adi_ssl_Init() and init_code examples are only taking care of initializing the EBIU registers.

Thank you for any help.