what is the best way to functional test the AMI and DDR2 of SHARC on a customized board?
I assume you are talking about ADSP-21469 processor as you mentioned DDR2. Not sure if I can give very specific comments as the amount of testing, methods, test cases etc. might depend upon the goal of the testing, any critical areas you want to test etc. However, a basic test may be probably to first write known data (random values) to all the AMI (SRAM) and DDR2 address locations and read it back to verify if the read value matches with the expected values. Other than this, I may be able to comment better if you could mention whether you are looking for testing a specific functionality of the AMI/DDR2 controller ?
I actually wanna be able to read in (TDM) data via SPORT , store data on DDR2, then read the data from DDR2 and write it out via SPORT.
SPORT_IN is on DAI_P02 ( or P03) and SPORT_out can be on DAI_P09 or DAI_P10
Do you hvae a simple example code?
I think I have already provided you with an SPORT DMA example code in the thread below:
Did you get a chance to have a look in to it ? What specific problems you are facing when trying to modify that code?
Mitesh wrote: I think I have already provided you with an SPORT DMA example code in the thread below: http://ez.analog.com/message/42085#42085
this is this message
you mean this thread :
I did get the SPORT DMA
but it is in assembly
it is very hard for me to comprehend what it is
you have a example code in C?
Unfortunately, I don't have the C version of the core readily available. However, you may refer to some of the SPORT initialization codes in the example codes available with the VisualDSP++ installation folder. For example, the file "initSPORT01_TDM_mode.c" has SPORT initialization in C at the following path:
"...\Program Files\Analog Devices\VisualDSP 5.0\214xx\Examples\ADSP-21469 EZ-Board\21469 AD1939 C Block-Based Talkthru 48 or 96 kHz"
Hope this helps.
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