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ADF4350 - Register Operations

Question asked by ELADI on Feb 1, 2012
Latest reply on Feb 6, 2012 by rbrennan

ADF4350 Register Operations

1.)
It is stated that the proper order of writing data to the ADF4350 registers is in descending order from R5 to R0. It seems implied that the single write to R0 after writing R2 and R1will serve as the double buffer write to R0 for both. Is this true, i.e you don't have to wrte R0 immediately after writing data to to R2 or R1?

2.)
Is it necessary to change the LDF bit in register R2 at DB8 "on the fly" when setting a new frequency from FRAC-N to INT-N when the caculated value for the "FRAC" registor is 0, to get digital lock detect to work, or can it just be set to FRAC-N regardless of the value of the "FRAC" register?

3.)
Why does Register R5 have two settings for "low" in the LD PIN MODE register, DB23 and DB22?

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