In most of my designs I have to interface converters to an FPGA. I like to simulate my entire FPGA design, including any peripherals which may be attached, so I end up writing bus-functional models of the ADCs. Most converters, especially single-channel jobs with SPI ports, are pretty simple, and with a reasonably-complete datasheet description of the part functionality, models are easily written. In most cases, I adapt a model I've already written.
But I'm using the AD7689 in my current design, and I've written a model, but I'm unsure of its completeness and accuracy because the part has several different modes of operation and timing. In other words, I need to verify the model before I can verify my FPGA design.
So in the "it would be really great if ..." department, it would be really great if ADI could supply VHDL bus-functional models of their converters.
Because these models would be vetted and the users don't have to spend the time to develop the model.
If anyone is saying, "how can you model an ADC?" it's simple. Voltages are simply signals or ports of type real. Converting real to natural or integer or std_logic_vector is a simple assignment (with some type conversions/casts):
signal analogin : real; -- more likely a port
signal reference : real; -- more likely a port
constant NUMBITS : natural := 16; -- more likely a generic
constant MAXDIG : real := real(2 ** NUMBITS);
signal result_us : unsigned(NUMBITS-1 downto 0);
signal result_s : signed(NUMBITS-1 downto 0);
result_us <= to_unsigned(integer((analogin / reference) * MAXDIG), NUMBITS); -- for unipolar
result_s <= to_signed(integer((analogin / reference) * MAXDIG), NUMBITS); -- for bipolar
The analog input can be generated in a test bench using whatever method the user likes. It can be a sine wave or whatever crazy waveform, or it can be a nominal voltage dithered by random noise, or whatever.
So there it is!