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blanking syncs in ADV7611 and more

Question asked by daniel.d on Jan 18, 2012
Latest reply on Jan 19, 2012 by GuenterL


I am using an ADV7611 to implement an HDMI input board. It can goes in our system instead an SDI input board.

The board interfaces directly with an FGPA for audio, video and control.

Because of FPGA, we are trying to implement the simplest control strategy possible. We want, too, the two boards working in the nearest way.

I have a few questions about:




We are able to receive video working with CEA861 syncs. For convenience, we prefer to work with Blanking Syncs (HSync should be HIGH for the entire horizontal blanking period, including the EAV in case of video with  AV codes inserted, and the same for Vsysnc).

Is there any way to configure the ADV7611 to generate automatically Blanking Syncs?


Lock Detect



We want to detect any changes in the incoming video format, in order to configure pixel port and inform our system.

We are trying to employ CP_LOCK and CP_UNLOCK to generate interrupts. We expect CP_LOCK interrupt, when we are in our UNLOCK_state. Later, we expect CP_UNLOCK interrupt when we are in our LOCK_state.

But thy doesn’t work as we guess. CP_LOCK do not change even if we disconect the HDMI cable.


We have tried toggling CP_UNLOCK_EDGE_SEL with similar results (the state of CP_LOCK is different, but remains constant).


We are looking for a flag, preferably a single flag, that can signal a change in the incoming HDMI signal. Is there such flag?




The UG-180 say that I2S_TDM mode should be used only for multichannel audio, but it would be very convenient for us to work only in one port mode, instead of change it as a function of the number of channels received.

We are happy receiving only 48KHz audio, so this is not a problem.

Is it possible to always work in I2S_TDM mode?


Thanks in advance.