I have 10 MHz ultrastable sine wave ref. (13 dBm) from Rb atomic clock.
1. freq synthesizing from few MHz to few hundred MHz with good phase coherence (low jitter);
2. Multi channels with different freqs.
Structure: I need a fast clock to genereate stable clock signs. from 100sMHz up to 1 GHz and then use them as system clock for various of DDS directly. This clock generator is reference to atomic clock at 10 MHz eventually.
1. Connections between atomic clock and clock generator: I noticed that AD9523-1 requires input slew rate no less than 400 V/us in order to guarantee the nominal jitter performance of around 0.18 ps. But 13 dBm 10 MHz sine wave is one order of mag. lower than this requirement. On the other hand, employing fast comparator (say ADCMP573) would bring extra random jitter of 0.2 ps and deterministic jitter of 10 ps. Which plan would be ultimately better: driving it directly or using comparator? For the former it seems I could use a transfer to boost the amp. and then clamp V by diodes to increase slew rate;
2. Connections between clock generator and DDS: all clock generators' (from AD) output is digital, and normally DDS could accept it. But why does the datasheet of AD9959 evaluation board say sine wave is required? Should I ignore it and hook them up (EVAL board of ADCMP573 -> EVAL board ofAD9959) directly anyway?
3. Last question is about buffer: for better isotlation, I'd like to transformers to couple each channels. A 1 GHz digital sig. would be greatly distorted due to the limit of the BW of transfors(so hard to find one with a BW large enough to cover first few harmoics). How to solve this problem?
Thank you very much!