I'm trying to research a problem and need some answers to some questions I'm hopping someone here will now.
(1) I see the delays are calculated in linux-2.6.x/arch/blackfin/include/asm/delay.h ... but, the code there references the m68k processor as a source for pulling from the calculations; however, the m68k processor code for the same doesn't support what we have for the blackfin. Is this old information?
(2) I can also see where the loops_per_jiffy is calculated. However, most documented souces I see say that any delay for the calculation should be as follows:
delay = (usecs * HZ * loops_per_jiffy) / 1000000;
Most seem to be following this with some variation of:
delay = (usecs * (2**32 / 1000000)[rounded up] * HZ * loops_per_jiffy);
So, I have to ask; why does the blackfin have a special calculation for the delay or loops?
(3) What does the blackfin actually use to increment jiffies? And where? ie: what module and what peripheral is providing the timing for this?