I can see the Center Frequency spec and the lowest bandwidth is 13MHz, If I program a bandwidth of 150MHz and a Cf of 75MHz where is the low cutoff? Same on the upper end?
Its not possible to get a bandwidth of 150MHz with a center frequency of 75MHz.
Frequency of LO should be greater than half of the sampling rate and 80% of sampling rate is the max bandwidth which you can get at the output. So ,
F(Lo)-(max BW)/2 is the minimum frequency which you can get
What would the sample rate be if I selected 75MHz as my input center frequency?
You can use a sampling rate of 122.88Mhz but in that case you can get a max BW upto 98Mhz.
You can use other sampling rates also but in that case you can have to take care of the DEV_CLK freq as the on board VCXO is 122.88MHz.
So for this scenario (122.88MHz Sample Rate) I would have the low end of the band at 25.8MHz. Will the analog inside the device support this low of a frequency?
It will pass it but will not meet datasheet specs and performance will be poor at that frequency.
You have to test and verify if you plan to use frequencies below 75MHz.
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