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About the failure of AD9361 using LVDS mode

Question asked by zhousong1987 on Aug 6, 2018
Latest reply on Aug 6, 2018 by sripad

XC7A200T+9361 has been used to verify the COMS mode and LVDS mode of 9361, both of which are correct。


But now with XC7Z100+9361, COMS mode is correct and LVDS mode is not available.The 9361 clock in LVDS mode is correct, but RX_0_N,RX_0_P all the way to RX_5_N,RX_5_P has no output.


The same problem exists with the XC7Z035+9361 approach


Both the schematic diagram and the PCB are correct because it works perfectly in COMS mode,


I tried to replace the 1.8v of 9361 with 2.5v, but it didn't work


Is it because ZYNQ's FPGA doesn't support the 9361 LVDS model?