I am looking at AD reference designs for Xilinx FPGA. Xilinx claims support for JESD204b over GTP for in its IP core.
However, all the AD JESD204b interfacing examples given are for higher-end devices with GTX transceivers.
Is it possible to use AD9371 with a Xilinx device with a GTP transceiver?
Is there an AD reference design with a GTP tranciever?