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The problem of AD9361 ENSM can't enter RX state.

Question asked by yf.chou on Jul 30, 2018
Latest reply on Jul 31, 2018 by yf.chou

   I configured AD9361 to enable level mode(TDD).  The value of SPI register 0x14 is 0x18(Level mode and To_Alert=0) and  register 0x15 is 0x08. I measured the ENSM state[3:0] by scope(5h->6h->0h->5h), the AD9361 can't enter RX state when  ENABLE  is high and TXNRXN are low. What am I missing? 


tdd timing compare to datasheet