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HMC832 Divider

Question asked by Virustek on Jul 30, 2018
Latest reply on Jul 31, 2018 by Virustek

Hello!

There was a problem with the inclusion of a divider in the HMC832 chip.


The essence of the problem: the chip should give out the frequency at the output of 276 MHz (2760/10).
At first there was absolutely nothing at the output, but after the VCO_REG 0x01 register was additionally programmed into the default values, the output was a frequency of 2760 MHz on the positive output.

 

Frequency division is not achieved in any way. Tried to register VCO_REG 0x02 write the values from 1 to 62 - division is not obtained, at the output of the chip only the frequency of 2760 MHz.

 

Format of command:

 when "00000" => data1_i <= "00000000000000000010000000000";    -- reg 00->0x000020
when "00001" => data1_i <= "00000000000000000000001000001";   -- reg 01->0x000002 0x000001
when "00010" => data1_i <= "00000000000000000000101000010";   -- reg 02->0x00000A 0x000001
when "00011" => data1_i <= "00000000111111111000100000101";      -- reg 05->reg1_VCO->0xFF88
when "00100" => data1_i <= "00000000011111110001000000101";      -- reg 05->reg2_VCO->0x0FE 0x0CA
when "00101" => data1_i <= "00000000010011011001100000101";      -- reg 05->reg3_VCO->0x09B 0x09B
when "00110" => data1_i <= "00000000010011010011100000101";      -- reg 05->reg7_VCO->0x09A 0x09A
when "00111" => data1_i <= "00000000000000000000000000101";      -- reg 05->close VCO
when "01000" => data1_i <= "00000000000001110100100000110";   -- reg 06->0x000748 0x000748
when "01001" => data1_i <= "00000000001000010100010100111";   -- reg 07->0x002145 0x002145
when "01010" => data1_i <= "11000001101111101111111101000";      -- reg 08->0xC1BEFF 0xC1BEFF
when "01011" => data1_i <= "00011111111111101111110101001";      -- reg 09->0x1FFEFD 0x3FFEFD
when "01100" => data1_i <= "00000000000100000100010101010";   -- reg 0A->0x001045
when "01101" => data1_i <= "00001111100000000110000101011";   -- reg 0B->0x0F8061
when "01110" => data1_i <= "00000000000000000000000001100";   -- reg 0C->0x000000
when "01111" => data1_i <= "00000000000000001000000101111";   -- reg 0F->0x000081
when "10000" => data1_i <= "00000000000000101011001000011";   -- reg 03->0x0002B2 0x000031
when "10001" => data1_i <= "00000000000000000000000000100";   -- reg 04->0x000000 0x000000
when others => data1_i <= "00000000000000000000000000000";

 

Please indicate my mistakes, thank you!

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