I have a couple of questions about schottly diode requirements of LTC3440.
Please take a look at the attached my questions and take care of this case.
D1 is the schottky diode across SW1 and ground pin. It is recommended for better efficiency as the schottky diodes will have lower voltage drop during the break-before-make time.
Schottky diode D3 (Across SW1 and VIN) and D2 (Across SW2 and VOUT) is required for the switch pins to avoid exceeding its absolute maximum voltage rating. Voltage spikes seen by the switches inside could be a volt due to bond wire inductance at high current. At higher VIN/VOUT the chances to cross the absolute volt rating is more and switches might fail or act erroneously. So the schottky diodes are required as a snubber. This is a conservative design approach.
It is also recommended to add decoupling capacitors very close to the switch pins to reduce the spikes.
Let us know your design specifications and we can assess the requirement of schottky diodes.
To tell the truth, I have one (1) defective LTC3440. Its SW1 pin is shorted to GND and an EOS damage can be seen there according to the failure analysis result by ADI.
I am currently considering the measures for this problem and one more question.
My spec is Vin=5V, Vout=3.3V and Iout=0.2Amax. According to the data sheet page 13, when VIN>4.5V, 2Ω/1nF series snubber, a schottky diode and a ceramic bypass capacitor are required. No snubber and the schottly diode in my circuit currently. I should add the snubber between SW1 and GND and the schottly diode from SW1 to VIN?
For Vin=5V , as the datasheet suggests schottky diode between SW1 and VIN and snubber between SW1 and GND should be added. A good PCB layout is also a key to minimize the unwanted noise and parasitic inductances. It is always recommended to follow the layout design suggestions given in the datasheet. If you want you can also refer the Application Note on good switching power supply layout considerations on our website(AN-136)
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