I'm having a hard time finding how I should be constructing these signals going into the ADV7282A-M (using Ain1, Ain2 and Ain3).
The documentation mentions for CVBS that a 1.4V input signal is brought down to 1V using the 25/51 divider recommended. I'm not sure where that 1.4V number comes from, is that excluding the sync portion?
CVBS (including video and sync) is typically 2V before going into a 75R/75R divider which generates 1V. (first 75 from the source, second 75 at the receiver end)
if I take a 2V CVBS signal and apply it to the recommended single ended input, that will generate a 680mV input signal into the Ain pin (since the 75R will half it, then the 21R/54R brings it down 0.68).
That means that the video portion is about 477mV and the sync about 200mV of that 680mVpp signal
Is that what I want to do with the Y input as well for the video and sync portion?