We have an issue about the clock network. We change our design from section 1 to section 2. Section 1 AD9523-1 clock gen send clock ad9122 and fpga. Section two we changed ad9523-1 with adf4351 and send clock to ad9142A. Should I send clock to FPGA like network section 1 or is this clock send to FPGA necessarry to senfing data between FPGA and DAC ?