I have a question about SCK timing for exiting NAP mode. According to the datasheet, we should send a pulse on SCK showing Fig.8 on the datasheet.
Can I exiting NAP mode if I send the pulse like a following timing?
I think you are asking if an SCK pulse in between the first and second CONV pulses will prevent the ADC from going into NAP mode. The answer to that question is yes.
If the LTC2312 is already in NAP mode before the first CONV pulse shown, the rising edge of SCK will wake the part and the second CONV pulse will start a conversion. The time between the rising edge of SCK and the rising edge of CONV should be at least 50ns to satisfy the twake_nap time of the data sheet.
Thank you for your answer.
But I'm so sorry my question was not appropriate. I wanted to confirm we can stop to turn NAP mode from normal mode after second rising edge of CONV if we send a SCK pulse between 1st CONV pulse and 2nd CONV pulse.
Thanks & Regards,
I have some additional questions. I'll post them as a new question.
Retrieving data ...