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ADV7282AM CSI-2 Output Problem

Question asked by erogenous_tones on Jul 18, 2018
Latest reply on Jul 20, 2018 by erogenous_tones

I've recently begun attempting to use an ADV7282AM chip and am just trying to output the 480p Color Bars.  I can communicate with the chip no problem, and have programmed it using the ADV7282M codes I found, as follows:

:Color Bars 480p MIPI Out:
delay 10 ;
42 0F 00 ; Exit power down mode
42 00 04 ; ADI Required Write
42 0C 37 ; Force Free-run mode
42 02 54 ; Force standard to NTSC-M
42 14 11 ; Set Free-run pattern to color bars
42 03 4E ; ADI Required Write
42 04 57 ; Enable Intrq pin
42 13 00 ; Enable INTRQ output driver. !!!!!!!
42 17 41 ; select SH1
42 1D C0 ; Tri-State LLC output driver
42 52 CB ; ADI Required Write
42 80 51 ; ADI Required Write
42 81 51 ; ADI Required Write
42 82 68 ; ADI Required Write
42 5D 3C ; Enable Diagnostic pin 1 - Level=1.125V
42 5E 3C ; Enable Diagnostic pin 2 - Level=1.125V
42 FD 84 ; Set VPP Map Address
84 A3 00 ; ADI Required Write
84 5B 00 ; Advanced Timing Enabled
84 55 80 ; Enable I2P
42 FE 88 ; Set CSI Map Address
88 01 20 ; ADI Required Write
88 02 28 ; ADI Required Write
88 03 38 ; ADI Required Write
88 04 30 ; ADI Required Write
88 05 30 ; ADI Required Write
88 06 80 ; ADI Required Write
88 07 70 ; ADI Required Write
88 08 50 ; ADI Required Write
88 DE 02 ; Power up D-PHY
88 D2 F7 ; ADI Required Write
88 D8 65 ; ADI Required Write
88 E0 09 ; ADI Required Write
88 2C 00 ; ADI Required Write
88 1D 80 ; ADI Required Write
88 00 00 ; Power up MIPI CSI-2 Tx --done--

 

I have verified that all these settings have been programmed in (Although I notice register 0x13 does not stay at 00, it changes or at least reports a different value.

I have a scope hooked up the one leg of the data lanes just so I can see what happens when I execute all this code.  The output goes up to about >400mV and just stays.  It would appear to me that it is in the LS mode.  I'm unclear what I have done wrong, or, if there is something else I should be doing to get the output to free-run the test pattern.

 

I checked all 4 of the MIPI connections and they are all held at this same level after I run the above code.

 

Thanks.

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