I've download the AD9689_ADS7v2.zip, extracted the Vivado 2015.2 project, I have a valid JESD204 license, and built a bitstream. At this point I am not sure how to correctly load the FPGA. I've tried using the JTAG connector to program the FPGA with the Vivado output fpga_dig_top.bit file but the ACE tool produces errors and can't collect data with this bitstream.
I have another thread for this issue: Modifying AD9208 FPGA for ACE in which another admin (Matt) mentioned that I maybe able to override the FPGA image that the ACE software loads the FPGA with. However the process to do this was not clear.
My questions are:
* After building an FPGA image for the AD9208/AD9689 how to I properly program the FPGA?
* If I want to override the FPGA image that ACE will load the FPGA with what files are required?
* Is there any known reason why Vivado ILA would not work on the ADS7v2?
* Does the Blackfin need to be reload/reflashed?
I look forward to hearing from you!