I am going to use ADXL357 in my application and am trying to decide which digital interface (I2C/SPI) to choose.
Host processor related details:
The host processor OSD335x-SM I am using only supports the 100 KHz and 400 KHz I2C modes and does not support the fast mode plus (1 MHz) nor the high speed mode (3.4 MHz).
Regarding SPI, it is mentioned in the processor's datasheet that the master clock generation is programmable and operates from fixed 48-MHz functional clock input.
1) In the datasheet (p.26) is mentioned that "Due to communication speed limitations, the maximum output data rate when using the 400 kHz I2C mode is 800 Hz, and it scales linearly with a change in the I2C communication speed. For example, using I2C at 100 kHz limits the maximum ODR to 200 Hz". This means that the maximum possible ODR using the mentioned processor will be 800Hz. Can someone please explain to me where did these numbers (800 Hz or 200 Hz) come from. Do these limitations apply as well for the SPI?
2) Are the internal clock frequency and sampling rate always equal to 4 KHz? And without taking into consideration the digital interface limitations, the ODR is equal to this internal clock frequency divided by (2/4/8...) as shown in table 10?