I am using AD9739a for a bpsk modulator system. RF Front End expects pulse shaped signal (Baseband BPSK signal) and upconverts it then. For intersymbol interference reasons, I want to put an FIR filter and eleminate harmonics of the pulses. I designed an FIR filter and find out the necessary coefficients for that. Then, I examined your example Integrate FIR filters into the FMCOMMS2 HDL design [Analog Devices Wiki]. The implemented filters hdl/library/util_fir_dec at master · analogdevicesinc/hdl · GitHub and hdl/library/util_fir_int at master · analogdevicesinc/hdl · GitHub are also looked out.
However, obviously, the reference design of FMCOMMS2 is different than AD9739a. While the DMA Controller for FMCOMMS2 outputs 16 bits for each I and Q data, same DMA Controller for AD9739a is configured to output 256 bit data for each clock cycle. Because of the reasons I stated, I got stuck with this problem. Do you have any idea from your experiences to configure fir compiler for 256 bit data input?
Any help will be appreciated,