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Making the AD1934 give output

Question asked by swatsid on Jul 11, 2018

I am trying out a weird combination to make the AD1934 work.

 

This is my register configuration:

 

PLL clock control 0 : 0b10001000 (Input 256xfs, 256 x fs output at MCLKO, internal MCLK enable)

PLL clock control 1 : 0b00000000 (DAC clock source and clock source select - PLL)

DAC control 0         : 0b01000000 (TDM mode)

DAC control 1         : 0b00110000 (LRCLK and BCLK master)

DAC control 2         : 0b00011000 (16 bit word width)

 

I connected MCLKO with MCLKI and the frequency obtained is ~24 MHz. DSDATA1 is connected to 3.3V.

Reason for this weird configuration with both the clocks being master is just to make the IC give an output. Now as the clocks are being produced by the IC itself, having a HIGH input on the DSDATA1 line would make all the output channels to max voltage. But the voltage stays at 1.5V nominal voltage. In stereo mode too the output doesnt change. I even connected DSDATA1 to DLRCLK or DBCLK to have a variable input but still the output stays at 1.5V. Please guide me what i should do to make it work.

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