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AD9361 TX_FRAME level mode

Question asked by wukai on Jul 3, 2018
Latest reply on Jul 3, 2018 by srimoyi

I have a problem.

   As I read AD9361_reference_manual_UG-570, Page 107 of 128, I found the following message:

         Tx_FRAME can accept a single high transition at the beginning of a burst that stays high throughout the burst or a             pulse train that has a rising edge at the beginning of each frame (50% duty cycle).

   When I use Tx, TDD mode, 2tx, my chip can't provide the pulse train signal. So  I make Tx_FRAME = 1,throughout the tx(307200 symbols), as a result , ad9361 accept the data,but the out-band noise is very high. I read the AD9361 Register Map Reference Manual UG-671,I found the RX_FRAME registers(Register 0x010,D3)  between level mod and pulse mod,but I can NOT find the registers for TX_FRAME.

      How to use TX_FRAME level mode?

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