I generated vivado fmcomms2 HDL_2016_2 libraries for zedboard. I could initiate the fmcomms2 ad9361 interface in the hardware through SDK NO OS Code. I could capture the fmcomms2 tx data in the spectrum analyzer, for which DAC sin data fed through the SDK NO_OS code.
Now my quiery is that i wanted to add DAC data to the ad9361 IP ports from PL side. The DAC data i have is VHDL module which i wanted to add as a submodule in HDL_2016_2 libraries created project.
Please someone help me to add my own DAC vhdl data to the ad9361 IP ports.