How to configure AD9517 in AD9268 Evaluation board using SPI Controller software? I am using HSC-ADC-EVALC board to connect AD9268 EVM
It is necessary to do some hardware modification and to follow the specific procedure to set up the AD9517 as the input clock to the AD9268 on the AD9268 Evaluation Board. I attach a file named "AD9268_9517_evb_setup.pdf" that show the steps to follow for setting up the AD9517 and AD9268 along with configuration file(.cfg) and cal file(.cal). I wish it works.
The user guide (UG-003) describes the hardware connections required to use the AD9517 on page 6 in the last paragraph of the section "Clock Circuitry for the AD9269 Family." You will need to make these changes to connect the AD9517 to the AD9268. You will need to use SPIController to configure the settings on the AD9517. There is a configuration file titled "AD9517spiR03.cfg" that can be used for SPI communication with the AD9517 on the AD9268 evaluation board. Please consult the AD9517 data sheet for how to set up the device for your desired configuration. I find it helpful to download the AD9517 software in order to become familiar with the SPI settings on the device and then translate those settings into SPIController to configure the AD9517, but it isn't a required step.
I loaded the "AD9517spiR03.cfg" config file to the SPIController software, but an error pops up that " Read Test Failure" Chip ID is not known. NewDUT will not proceed
Did you program the FPGA first with the AD9268 FPGA program in VisualAnalog prior to trying to read from the AD9517 in SPIController?
It would be a good idea to first verify that you have a working device and get an FFT. That way you know you have a good starting point. You could then configure the hardware to use the AD9517. The FPGA program must be loaded so that the SPI communication would be possible. I'd also make sure that R708 and R709 are installed on the AD9268 evaluation board.
First I configure AD9268 FFT through Visual Analog then tried to connect AD9517 using SPI controller "AD9517spiR03.cfg" but it does not work. Both R708 and R709 installed on AD9268 evaluation board.
Is there any other FPGA program to configure AD9517 through Visual Analog?
There is not an FPGA program specific to the AD9517. All the FPGA programs that are utilized and programmed through VisualAnalog would be for ADCs.
It has been a while since I pulled up this software but after going back in and looking over the config in SPIController it came to mind that you should change the FIFO Chip Sel # setting. I believe you should set this to 2 in order to assert the correct CSB for the AD9517. You can access this in SPIController by clicking Config->Controller Dialog and the selecting the desired number in the drop down box for FIFO Chip Sel #. This could very well be why SPIController is not reading back from the AD9517 since it is not asserting the correct CSB. I would start by trying 2 and then using an oscilloscope to probe the SPI lines to confirm. If that doesn't work then try 3 and then 4 checking for signals on the SPI lines with the oscilloscope.
If this does not get things rolling then it may be possible that software updates over the last several years since this product was released have now resulted in a conflict. Unfortunately, with the number of products released and continuing changes to OS environments it is not possible to retroactively test every permutation of possible connections on all the ADC evaluation boards. The default configurations are verified as they are tested in that configuration before the eval boards are placed into stock.
After loading FPGA through Visual Analog, I tried by loading SPI controller with "AD9517spiR03.cfg" and change FIFO Chip Sel # setting to all the available options but ADC9517_CSB is not responding to any SPI read. I am doubtful whether Visual analog FPGA programming the I/O as AD9517_CSB. Also I found AD9268 chipselect is working with all FIFO Chip Sel # settings.
Doubting the software ..do you have any older versions of both Visual Analog and SPI controller software ready to be used with HSC-ADC-EVALCZ and AD9268 evaluation board.
Thanks for the update. I thought the last few suggestions might get things going, but it seems that I need to do some more digging. I will check into this with some additional folks.
We do not push out older versions of the software unfortunately. Even if that were available there is no way to know what previous version to try.
I will get back to you or it may be someone else that can reply with some additional info, but either way we will get back to you with more details as soon as possible.
Thank you Tony!
Just as an FYI, if you are running Windows 7 or 10 the file locations for the cfg files may be different than those listed in the pdf that Tony attached. I believe that document was written when Windows XP was the primary OS for many folks. If you have a different OS please let us know as some modifications to the file path and in the cfg file are required.
Thankyou Harris and Tony.. Its worked as Tony suggested...Im using Windows 10 and already chaged cfg files locations. Trying with different settings ..will update you shortly..
Thankyou, its worked with default configuration. I m trying with some diffrent configuration. will update you once its completed.
its worked with default configuration but i tried to change the frequency but ad9517 not getting locked and expected frequency not coming with calculated values..My configuration is
Input frequency: 10MHz at +14dBm
Expected output frequncy:57.6MHz
Register Configurations: R divider=5, A counter=0, B Counter=54, prescaler =16/17 DM mode, VCO divider=5,
Divider1 for ouput channel=6
is there any other settings to be configured for getting 57.6MHz frequency from 10MHz input
In the default configuration, its observed that GUI (SPI controller) configured with AD9517_for_AD9268EVB.CAL and AD9517_for_AD9268EVB.CFG
The output is correct and I verified it with scope, but when I use the default values (from SPI controller) in the equation its calculated as out3 as 245.76MHz. I also verified it with "AD9517 evaluation software" its showing out3 as 245.76MHz. I cannot verify this becoz i don't have the AD9517 EVM. why its so ..
One other thing found is that in SPI controller gui OUTPUT5 LVPECL(F5) to be configured but in schematic out3 is used (but register address ok). Also as per AD9517 block diagram divider1 is connected to out3 but in gui we need to configure DIVIDER2 PECL(196) for getting results (here also register ways its correct)
GUI default values are R=4, A=0, B=6, prescaler=DM16/17, VCO=3, DIVIDER2 PECL=2(Hi clk cycles=1, Low clk cycles=1) .. This default configuration getting output as 122.8MHz from 61.44MHz external clock.
But as per AD9517 evaluation software, DIVIDER1=4 (Hi clk cycles=2, Low clk cycles=2) to get the 122.88MHz from 61.44MHz. This is not verified with EVM. Equation from datasheet also calculated to be 122.88 MHz with DIVIDER1=4 (Hi clk cycles=2, Low clk cycles=2)
Do you have any clue in this regard.
Let me see if we can solicit pkern for some specific input on the AD9517.
Paul, could you offer some input on these AD9517 questions? Thanks!
I'm happy to help. Are you using the AD9517 internal VCO? If so, it's the -4, right?
If we have Fin=61.44 MHz, R=4, N=96 (A=0, B=6, 16/17 mode), VCO div=3, and Ch Div=4 (2 high/2 low cycles),
then we get Fout=122.88.
Now, I think I might see the issue:
> GUI default values are R=4, A=0, B=6, prescaler=DM16/17, VCO=3,
> DIVIDER2 PECL=2(Hi clk cycles=1, Low clk cycles=1) ..
> This default configuration getting output as 122.8MHz from 61.44MHz external clock
There are two Divider2's: Divider 2.1 and Divider 2.2. Make sure that divider 2.2 is bypassed in R0x19C<5>.
My suspicion is that you have a /2 on Divider 2.1, and a /2 on Divider 2.2. Also, keep in mind for registers like R0x199, 0x00 is a divide by 2 (1 high and 1 low cycle). /4 is programmed by writing 0x11.
Yes we using AD9517-4 internal VCO.
We are using output 3 . Asper datasheet output 3 is connected to Divider 1...
But one interesting thing that in the GUI default configuration output5 to be configured for getting output3. and as per datasheet divider1 responsible for output3 but from GUI divider2 PECL to be configured for getiing any changes in the frequency.. But in GUI register address mentioned for output5 and divider2 corresponds to register address of output3 and divider1 and output responds to changes in these portions. i think it may be GUI mistake.. But still the frequency getting is different than the equation in datasheet.
Some basics that we done so far..
We are trying to evaluate AD9268 ADC using its evaluation board(P/N: AD9268-125EBZ). and we need to evaluate AD9268 using its internal AD9517-4 . For that purpose, we are using SPI controller software to configure AD9517-4 and Mr.THA send me some default configuration to setup AD9517-4 using SPI controller(that files are attached in the earlier posts). That default configurations are for AD9517-4 with input clock of 61.44MHz and output3 with 122.88 MHz and it works well with PLL locked.. Some findings I found in that SPI controller GUI with default configuration are ...The evaluation board hardware is set up for output3 but in SPI controller GUI(default configuration Mr.THA send me in his earlier post) output5 is configured for normal operation and other outputs are in power down but I found output5 register address actually corresponds to output3 register address and it may be a GUI error. I verified this by powering down output5 from GUI and it reflects in output3 of the board..
One more bug I found in GUI is divider configuration. As per datasheet, output3 routed to divider1 but in GUI I need to configure Divider2 PECL(register addresses 196,197,198) and I found in datasheet these addresses corresponds to divider1 and believes its a bug in GUI.
Again i used AD9517-4 evaluation software to find the register values to configure SPI controller GUI for a input clock of 61.44MHz and output3 with 122.88MHz..
From AD9517-4 evaluation software I found the following values R=4, A=0,B=6, Prescaler=DM16/17, VCO=3 and Divider1 PECL =4 ( attached image of evaluation software as "AD9517EvalSW fig1")
But in SPI controller GUI with default configuration, I found the following values returned 122.88MHz from 61.44MHz
R=4, A=0,B=6, Prescaler=DM16/17, VCO=3 and Divider1 PECL =2 i.eHI CLK=1 and LowCLK=1
Also I used the equation from datasheet to verify this and I found AD9517-4 evaluation software values are correct.
Do you have any clue on this regard.
Retrieving data ...