I am using the AD9154 to supply modulation to two transmitters on an RF module.
Sometimes after booting the module there is no output from DAC 0 and DAC 1. DAC 2 and DAC 3 work as expected. All 4 DACs in the device are being programmed at the same time with the same commands. There is no output when adjusting the DAC DC offset ( I and Q) for DACs 0 and 1, although DACs 2 and 3 work as expected.
We use the AD9154 on a module currently in production and have built hundreds of units without seeing this issue. This new prototype uses a copy and paste of the original schematic and PCB layout from the current module, the only difference is that the clock input is increased from 153.6 to 614.4MHz. The DACPLL is however programmed in both cases to give the same internal DACCLK of 1228.8MHz. The SPI clock is 5MHz which is the same as the original design.
The TXEN0 and TXEN1 are both high during operation. The DACPLL and SERDES PLLs both report their respective PLLs are locked (Regs 0x084 and 0x281). To rule out any issues with JESD data being supplied, we have recently just been using the DC offset to investigate this. The BSM register (0x147) reports 00. This is the case for DAC0,1 and 2,3 and doesn’t seem to change whichever the DACs are being polled or whether the DACs are working or not. The only solution seems to be to cycle the power and reboot. Even a soft reset does not fix this.
Are there any known issues affecting DAC0 and DAC1? Any suggestions/experiments to try to diagnose the issue?