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Generic axi_adc_ip write FIFO interface documentation

Question asked by mertk on Jun 19, 2018
Latest reply on Jun 26, 2018 by CsomI



I'm currently trying to understand how axi_ad9361 works. In my testbench, when I drive inputs according to waveforms given in AD9361 reference manual UG570, I see my data adc_data_x output port. But adc_enable_x port never asserts to 1. Is there a in-depth documentation of this IP where I can see how all input and output waveforms should be? Only documentation I have found so far is in this link


Best regards,

Mert Külte