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The DC problem of the AD9361

Question asked by Wanjack on Jun 14, 2018
Latest reply on Jun 15, 2018 by Vinod


The DC problem of the AD9361. (AES-PZSDRCC-FMC-G)
When I configure the AD9361 RX data rate to 2.048Mbps, no signal is input. I will always receive a DC signal, how does this DC signal be eliminated?
I hope to configure the AD9361 Rx bandwidth to 200K, but I find that the passband is not flat when the analog bandwidth is small. Is there any good solution?