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What are the steps fo properly initialize SMC B0 for Async SRAM access?

Question asked by sormel on Jun 13, 2018
Latest reply on Jun 18, 2018 by Jithul_Janardhanan

I'm testing ADSP-21584 on a custom board.

On my custom board I have an FPGA connected through SMC B0, all pins exept ARDY are connected.

In my CrossCore 2.8.0 project,

1. the pinmux includes all the used pins for SMC B0.

2. Functions from the FPGA are made available through a pointer to the SMC B0 memory space.

3. Upon startup I configure the SMC0_B0CTL, SMC0_B0TIM and SMC0_B0ETIM as recommended in the processor hardware reference.

4. When calling the functions in the FPGA I only receive strange results.


I've also tried

a) increasing all SMC0_B0 delays to max values

b) disabling read speculation in SMPU0


But the result remains the same.


What step am I missing?