I have some trouble in understanding the data flow in analog projects. When using an AD9680 and an ZC706 Evaluation Board the data of the ADC is going through an fifo into the DDR of the PL right? This PL DDR is for buffering which will be graded by the PS with bio right?
The ZC706 eval board uses an 1 GB DDR for the PS and and DDR3 SODIM Memory 1GB for the PL. I want to use this board (http://www.knowres.ch/products/krm-3z030-768/ ) which comes with 1 GB DDR3 for the PS and 256 MB DDR3 (1333MHz) for the PL.
What will be affected when using less DDR memory ? Where do I have to change sizes and addresses of my DDR? And is it even possible to me to change the DDR controller with MIG for custom DDR memory or do I have to consider something else?
Thanks and best regards,