I want to design a PLL using the HMC703 with an HMC509 or HMC511 VCO. I've been looking over the EVAL-HMC703LP4E schematic (which uses the HMC508 VCO) and associated datasheets. The output power of the HMC508 (and '509 and '511) is a little high (+10 to +15 dBm) for the RF input on the '703 (-3 dBm max), so a little pi attenuator (R7, R8, R12, R15, R16) was included to knock it down 15 dB or so.
That pi attenuator puzzles me.
If I've done my analysis correctly, the image impedances are 38.1 and 49.5 ohms. In particular, the input side sees a 38.1 ohm load and the output side sees a 49.5 ohm source impedance going to the VCOIN pin of the '703 PLL. But the '703 datasheet clearly states (p 6-31) "RF Input Stage ... This input is not matched to 50 O." There's nothing but a 100 pF DC-blocking cap between the pi attenuator and the input, so really no other termination than the input itself.
Is there something going on with R1, R2 and R3 that explains this discrepancy?