When the PLL is bypassed, how to retime the SYSCLK and SYNC_CLK ?
Is it only a way to do it, do the MASTER_RESET ?
When the AD9914 is powered correctly and is given a REFCLK with the PLL bypassed, the SYSCLK is equal to REFCLK and the output of SYNC_CLK is SYSCLK/24. But if at first you are using the PLL to output a frequency and decided to bypass it and directly use the REFCLK to have the same SYSCLK frequency, you can just issue a DAC Calibration and an I/O_UPDATE.
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