How to I check if my JESD lanes are working fine?
Check JESD Framer and deframer status. Enable the PRBS data and check the PRBS counters for any errors.
You can generate PRBS test pattern from framer and capture them in FPGA to analyze them. FPGA must have a PRBS test pattern analyzer for this to work. TALISE_enableFramerTestData() API function generates PRBS data from inbuild test PRBS generator. Please refer UG for details.
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