I have a bf592-A setup to boot from SPI flash over SPI0. I have a boot stream that includes an init_code block, which is being executed properly. In this initcode, I must use the SPI0 bus for some operations (which appear to be correct on a logic analyzer). When this is finished, the boot process should continue. What happens, is that the next header block is read, then boot stops. The interesting thing is, if I comment out just the SPI data transfers in the initcode (chip select and reads/writes of SPI TX and RX data registers), the boot then continues normally. I think I must be corrupting the DMA channel that the boot sequence is using, since I do not have to comment out the re-configuration of the IOs and SPI registers. Does anyone know which DMA channel the boot process uses? Is it the standard DMA5 that is normally assigned to SPI0, or is this adjusted for boot?