I was wonder if anyone had the Xilinx ZCU102 with DAQ2 FMC working with the display port enabled?
I have a build going for the XCU106 zynq ultra scale board base on the ZCU102 build using the current ADI HDL and Linux master. Currently I can see that the DAQ2 is working over a remote Ethernet with the OSC application.
The problem is that the display port on the ZCU106 is not working with messages on UART USB from Linux;
[ 11.767316] [drm:xilinx_drm_crtc_mode_set] *ERROR* failed to set a pixel clock
[ 11.774490] [drm:drm_crtc_helper_set_config] *ERROR* failed to set mode on [CRTC:27:crtc-0]
Now ff I do a Linux build with the .config setup without
It will not bring up the ADI JESD subsystem since not configured but the display port does come up and work in this case.
So it does appear that something in the ADI JESD driver or HDL is causing the display port clock go bad.
I realize the ADI team has been working on JESD Linux drivers, HDL, and support for DAQ2 on ZC102 so not sure this issue has been seen yet.