The customer use two ADV7612 in dual link application (the signal from DVI interface) and there's one of ADV7612 turn HDMI MAP register 0X07 & 0X07 read back is 0, and it's maean that DE regeneration not locked &Vertical filter has not locked, and the another one is normal. The HDMI MAP register 0X04 & 0X04 read back is '1'. And the input signal we use scope test is OK. There's no output in unnormal ADV7612. The other one is OK.
Those two ADV7612's input clock is from DVI interface(266MHZ), each of them frequency is 133MHZ test by scope .
The clock chain: DVI---->ADV7612_1---->ADV7612_2.
And i'll loop the customer engineer in this loop later.
Is there any advice or improve solution about this application issue?
Signal chain:DVI interface Input---->ADV7612_1&ADV7612_2---->FPGA+STM32F207----->out put interface.