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incompatible voltage using fmcomms2/3 on zcu102 bank 44

Question asked by add.jky on Jun 4, 2018
Latest reply on Jun 5, 2018 by lnagy



I am new to fpga development and i am working on the fmcomms3 with the zcu102 board.

I have downloaded the latest git hdl project and i have ran the tcl file that created the project using vivado 2017.3.1.

I have noticed that in the project there is constraint for bank 44 of the zynq us+ to be LVCMOS25 although the real voltage that supplied to said bank 44 of the zynq us+ is 3.3V (VCC3V3).


Is this constraint a mistake? Does it even matter? Why would Vivado care what hardware voltage is connected to any bank at all?