AnsweredAssumed Answered

AD9172 DLL failure to lock after PLL locks

Question asked by mrawson0000 on May 31, 2018
Latest reply on Jun 6, 2018 by landsman

Hello,

 

I am having a problem with the AD9172 DLL locking. On the eval board board I have no problems. On my custom breakout board, I can confirm that the PLL locking but the DLL can't seem to lock after that.

 

Input clock: This is currently coming directly from a sig gen. Checking the clock at the DAC input there doesnt seem to be any signal integrity or signal power issues. Also if the PLL is locking, seems unlikely input lock is source of problem.

 

System power: Checked pretty extensively.

 

Configuration: There is almost no configuration to the AD9172 DLL. I followed the startup sequence in the data sheet.

 

For the register 0x0C1, I tried all combinations of 0x69,68,48,49.  

 

Comm: No issues reading back reg values after writing them. I also tried clearing the DLL read status before writing to it. I also tried adding ample delay between enabling DLL read status and reading the lock bit register.

 

Any help or insight on what could cause the DLL to fail to lock would be greatly appreciated!!

 

Thanks so much,

Mason

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