I have recently purchased, the eval board of ADF4108. Initially, without altering any of the configurations as specified in the User guide, I tested evaluation board with the pre-defined configuration to generate the 6.4 GHz carrier with its inbuilt VCO using an external TCXO of 40 MHz. Facing the following issues:
I can see the locked output in spectrum analyzer, but the Lock detect LED is not glowing. I checked the Digital Lock Detect output and was getting 500mV output on my scope. What does it employ? I have read similar thread. But i need more insight into this as whether this is a problem with the eval board I have purchased or is it something else? As a debug, I have checked the R and N divider output, they are stable and equals to PFD frequency.
Why the DVdd is coming out to be 500mV instead of 3.3V? Is this correct?
I am unable to see any output on Analog LD (connecting with pull-up resistor).
My TCXO is operating at 40 MHz. But when, I am changing my TCXO frequency in the ADI Integer-N software without changing the actual TCXO frequency which is 40 MHz, the PLL is generating the carrier at some other frequency. I was assuming PLL should show the Free running VCO frequency, but the carrier is generated at some other operating frequency. Why does this happen?