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How is data packed in the AD9208 when using M=8

Question asked by ericc_engineer on May 29, 2018
Latest reply on May 30, 2018 by UmeshJ

I saw another similar question asking for documentation on this but there wasn't really an answer.  It's hard to understand when you are trying to debug and want to know exactly where samples should be showing up in the datastream.

 

I'm looking at 9208 with a configuration as follows:

L=1

M=8

F=2

S=1

N=16 (soon to be 14)

N'=16

K=32

 

How can I map all this converter data to the appropriate lanes and slot?  Specifically we've started with the altera 9208 demo and we're trying to verify we are doing it correctly.  After that we'll probably change the above parameters.  Still I don't have a good way to know where the data will show up.

 

Thank you

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