I have been trying to use the AD9364 (on a AD-FMCOMMS4-EBZ with ZedBoard) as a radar where I am stepping the frequency from 2GHz to 3GHz with 20MHz steps. I am using the No-OS drivers (hdl_2016_r2 branch). I am already using the fastlock profiles (saving them in BBP and then loading them). But I am having issues with this LO phase synchronization between TX and RX. I have gone through the MCS documentation ( Synchronizing multiple AD9361 devices [Analog Devices Wiki]) and also looked at the documentation on how to fix it in FPGA ( I/Q Rotation [Analog Devices Wiki] ). But unfortunately it was not clear enough for me to actually do it. Can someone please give me some more specific guidance on how to use the FPGA to do this? Thanks in advance.
mhennerich tlili DragosB travisfcollins