A few questions on synchronization of multiple HMC7044s.
1) Multiple HMC7044s receive the same reference clock on respective CLKIN1/FIN pin. This results in all individual VCXOs are phase aligned with the same input reference clock. Is this correct?
2) In our system, the external SYNC signal is phase aligned with the reference clock mentioned above and connected to SYNC pin on the HMC7044. Hence, this SYNC signal is therefore phase aligned with each VCXO and should meet setup and hold time required by the SYNC sampling clock. No external sampling with the OSCOUT1 clock required?
3) SYNC input is LVCMOS. External LVPECL-to-LVCMOS conversion will be required and eats into VCXO setup time. Is the entire period of the 128 MHz VCXO available?
Thanks for the help!