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Ad9371 multichipsyncronization failing.

Question asked by rohitka on May 21, 2018
Latest reply on Jun 1, 2018 by rohitka


I am using ad9371 chip on custom board . It has 3rd party clock generation device , which generates 122.88 Mhz clocks and 122.88 Mhz continuous sysref . I am following initialization sequence as described in ug992. Sysref is always turned on in our design. Initialization is failing during multi chip synchronization function.  MYKONOS_enableMultichipSync(). mcsStatus has 0x0 . Please provide some solution or debug insight to this.

If we bypass this multichip synchronization , will this affect multi lane JESD link establishment.?


Quick response will be appreciated.


Thanks & Regards