What is the maximum jitter of the output clock of the AD9520-1? I only see the typical values in the manual. It is the fs level. Can it be so good in reality?
someone told me that the maximun jitter of AD9520-1 is 80ps? but the datasheet can see just about 300fs
As a clock buffer (PLL bypassed), 80 fs is reasonable for additive jitter.
As a PLL, we need to know the input clock jitter, desired loop BW, jitter integration range, the type of jitter (i.e., cycle to cycle or integrated phase noise).
If the loop BW is < 1 kHz, and the integration range is 12kHz-20 MHz, the AD9520-1 jitter is closer to 350 fs. However, if the reference input is quiet, and the loop BW is high, it's possible to get 80 fs.
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