Is there a default TWI slave address for this part? or is any 7 bit address acceptable?
I could not find in any of the manuals a mention of an address, only a register.
The TWI slave mode address register (TWISADDR register shown in figure below) holds the slave mode address, which is the valid address that the slave-enabled TWI controller responds to. The TWI controller compares this value with the received address during the addressing phase of a transfer
Please refer TWI chapter in ADSP-214xx HRM for more information.
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